1. Field
Exemplary embodiments of the present invention relate to a semiconductor technology, and more particularly, to a programming method of a non-volatile memory device.
2. Description of the Related Art
Non-volatile memory devices may retain data stored therein even though power supply is cut off. Each memory cell of a non-volatile memory device includes a floating gate that is controlled by a control gate and the non-volatile memory device stores or erases a data into/from the memory cell by accumulating or withdrawing (or discharging) electrons to/from the floating gate.
FIG. 1 is a circuit diagram illustrating a conventional non-volatile memory device. The conventional non-volatile memory device particularly has a structure that each memory cell includes one floating gate and two control gates that are disposed adjacent to the floating gate.
Referring to FIG. 1, the conventional non-volatile memory device includes a plurality of strings, bit lines BL that are coupled with first ends of the strings, and a source line SL that are coupled in common with second ends of the strings. Each string includes a drain selection transistor DST, a plurality of memory cells MC0 to MC3, and a source selection transistor SST that are serially coupled.
Gates of the drain selection transistors DST of the strings form a drain selection line DSL stretching in a first direction, and gates of the source selection transistors SST of the strings form a source selection line SSL stretching in the first direction.
Each of the memory cells MC0 to MC3 includes one floating gate FG and two control gates CG that are disposed adjacent to the floating gate FG. For example, a first memory cell MC0 includes a first floating gate FG0 and first and second control gates CG0 and CG1 on both sides of the first floating gate FG. The control gates CG of the strings on a line of a first direction form a word line WL.
The non-volatile memory device prevents crosstalk from being occurring between neighboring floating gates and has an increased coupling ratio between the control gates and the floating gate.
However, since the conventional non-volatile memory device has a structure that neighboring memory cells share one control gate, when a voltage is applied to two control gates of a selected memory cell for the memory cell to perform a program operation or a read operation, the data of the neighboring memory cell may be influenced.
In particular, when a program voltage is applied to two control gates of a selected memory cell during a program operation, adjacent memory cells may be applied with the program voltage through one of their control gates. As a result, a program disturbance phenomenon where the memory cell is programmed by the program operation of the adjacent memory cell occurs.